Project Settings |
---|
Project Name | proj_1 | Device Name | impl1: Lattice MachXO2 : LCMXO2_4000HC |
Implementation Name | impl1 | Top Module | top |
Pipelining | 1 | Retiming | 0 |
Resource Sharing | 1 | Fanout Guide | 1000 |
Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
Clock Conversion | 1 | FSM Compiler | 1 |
Run Status |
Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
(compiler) | Complete |
7 |
0 |
0 |
- |
00m:00s |
- |
5/20/2025 11:06:59 AM |
(premap) | Complete |
5 |
1 |
0 |
0m:01s |
0m:01s |
172MB |
5/20/2025 11:07:02 AM |
(fpga_mapper) | Complete |
10 |
1 |
0 |
0m:03s |
0m:02s |
179MB |
5/20/2025 11:07:05 AM |
Multi-srs Generator |
Complete | | | | 00m:01s | | | 5/20/2025 11:07:01 AM |
Area Summary |
|
Register bits | 61 |
I/O cells | 9 |
Block RAMs
(v_ram) | 0 |
DSPs
(dsp_used) | 0 |
ORCA LUTs
(total_luts) | 45 |
| |
Timing Summary |
|
Clock Name | Req Freq | Est Freq | Slack |
top|I_CLK | 100.0 MHz | 153.1 MHz | 3.470 |
Optimizations Summary |
Combined Clock Conversion | 1 / 0 |
| |
|